\section{3D Interconnect Component Electrical Charateristic}\label{sec:others}
Although TSV is the key enabling component in 3D structure, electrical model of other components (micro-bumps, redistribution layers, C4, etc.) are necessary for full chip and full package analysis. Several works have beed done to model the redistribution layer (RDL), back-end-of-line (BEOL) and micro-bumps \cite{Wu2012, Alam2007, Roullard2011}.

The BEOL and RDL can be treated as traditional metal layers for signal transmission with resistance and capacitance. The theoretical values of resistance for RDL can be calculated from \cite{Roullard2011}:
\begin{equation}
R_{Th} = R_{RDL}+\frac{R_{Ground}}{2} = \alpha \frac{1}{w_{RDL} * t_{RLD}} \frac{3}{2}
\end{equation}
where $w_{RDL}$ and $t_{RDL}$ are the width and the oxide thickness of the metal layers. The resistance value of BEOL can be obtained in the similar way. The capacitance calculation is not shown in the previous works.

However, micro-bump can not be simply treated as metal layers due to the geometry parameters. In paper \cite{Wu2012}, the micro-bump is modeled as RLC model similar to the TSV model and this model uses the same equations that are used in TSV RC calculation. The micro-bump model contains resistance and inductance in serial along the structure from input to output port as shown in figure \ref{fig:microbump}. Two capacitances exist between micro-bump and connected tiers. One of the capacitance represents the capacitance between micro-bump and substrate of tier1 while the other captures the capacitance between micro-bump and the substrate of tier2. However, this micro-bump model is not accurate because the geometry properties is ignored. Different from metal layer and TSVs, micro-bump is a sphere-like structure which can't be simply treated as a transmission line or cylinder. 

\begin{figure}
\includegraphics[width=0.45\textwidth]{figures/microbump.pdf}
\caption{The RLC model of microbumps \cite{Wu2012}}
\label{fig:microbump}
\end{figure}

Besides the previous works on modeling micro-bumps, RDL and BEOL individually, the full chip modeling and analysis with all these components has not been fully explored yet. Moreover, the models of these components are under simple assumptions, the accuracy still needs to be examined. 